Markku-Juhani O. Saarinen

Professional

I’m a cryptographer – one of those people who professionally build and sometimes break cryptosystems. Here’s a recent CV and a clickable list of publications.

Since January 2023, I have been a Professor of Practice (työelämäprofessori) at Tampere University, associated with the Network and Information Security Group (NISEC) and the SoC HUB.

PQCrypto 2024 and 2025

I am the Program Co-Chair of PQCrypto 2025 with Ruben Niederhagen. PQCrypto 2025 will be held in Taipei on April 8-10, 2025. The deadline for submissions was October 25, 2024 (CFP).

I was the Program Co-Chair (with Daniel Smith-Tone) of PQCrypto 2024, which was held at the University of Oxford Mathematical Institute on June 12-14, 2024. The PQCrypto 2024 proceedings are now out from Springer: Part I - LNCS 14771 and Part II - LNCS 14772.

CHES 2024 Artifact Evaluation

I was the Artifact Chair of IACR CHES 2024. This work has now concluded. Here are the CHES 2024 Artifacts.

Online Research Papers and Presentations (2021-)

Keynote talk at AusQRC 2024 (November 18, 2024). Slides: “PQC Transition in Hardware: Processors, SoCs, IoT, Secure Elements”.
Two talks at RISC-V Summit 2024 (October 21-23, 2024). Slides: “Marian: An Open-Source Implementation of the RISC-V Vector Cryptography Extension” and “Making the Case for a Keccak Instruction: Post-Quantum Cryptography on RVV”.
Poster (with Thomas Szymkowiak and Endrit Isufi) at ACM CCS 2024 (October 14-18, 2024): “Marian: An Open Source RISC-V Processor with Zvk Vector Cryptography Extensions”. There’s a three-page abstract as an IACR e-Print. This will also appear in the proceedings.
Invited talk at OPTIMIST 2024 (September 4, 2024). Slides: “Artifact Evaluation and Reproducibility (at CHES)”.
Paper at CRYPTO 2024 (August 18-22, 2024): “Accelerating SLH-DSA by Two Orders of Magnitude with a Single Hash Unit”. Artifact. GitHub. IACR e-Print. Slides 2024-08-22.
Paper at EUROCRYPT 2024 (May 26-30, 2024): “Threshold Raccoon: Practical Threshold Signatures from Standard Lattice Assumptions”. IACR e-Print. (with R. del Pino, S. Katsumata, M. Maller, F. Mouhartem, and T. Prest).
Presentation at NIST PQC 2024 (April 11, 2024). Slides: “Accelerating SLH-DSA by Two Orders of Magnitude with a Single Hash Unit”.
Presentation at Real World Crypto 2024 (March 25, 2024). Slides: “RISC-V Cryptography Evolution: High Assurance and Post-Quantum Cryptography” (with G. R. Newell and N. Brunie).
Presentation at RISC-V Summit 2023 (November 8, 2023). Slides: “Benchmarking RISC-V Post-Quantum Crypto”.
Presentation at ICCC 2023 (November 1, 2023). Slides: “Post-Quantum vs. AVA_VAN”.
Paper at PQCrypto 2023 (August 16-18, 2023): “WrapQ: Side-Channel Secure Key Management for Post-Quantum Cryptography”. Slides 2023-08-18.
Paper at SAC 2023 (August 16-18, 2023): “Mask Compression: High-Order Masking on Memory-Constrained Devices” (with M. Rossi). Slides 2023-08-16.
Presentation in RISC-V Technical Sessions (June 29, 2023) Slides: “RISC-V Cryptography and Hardware Security”.
Presentation at RISC-V Summit Europe 2023 (June 05, 2023) Slides: “Cryptography Extensions Update”.
Submission to NIST Call for Additional PQC Signatures (June 1, 2023): “Raccoon: A Side-Channel Secure Signature Scheme”. (with Rafaël del Pino, Thomas Espitau, Shuichi Katsumata, Mary Maller, Fabrice Mouhartem, Thomas Prest, and Mélissa Rossi.)
Submission to NIST Call for Additional PQC Signatures (June 1, 2023): “LESS: Linear Equivalence Signature Scheme”. (with Marco Baldi, Alessandro Barenghi, Luke Beckwith, Jean-Francois Biasse, Andre Esser, Kris Gaj, Kamyar Mohajerani, Gerardo Pelosi, Edoardo Persichetti, Paolo Santini, and Robert Wallace.)
Presentation at IEEE SP 2023 (May 22, 2023) Slides: “High-Order Masking of Lattice Signatures in Quasilinear Time”. (with Rafaël del Pino, Thomas Prest, and Mélissa Rossi.)
Presentation at NIST PQC Seminars (April 4, 2023). Slides: “Intro to Side-Channel Security of NIST PQC Standards”.
Presentation at ETSI/IQC QSC9 (February 13-15, 2023). Slides: “PQC Side-Channel Leakage Assessments in the Semiconductor Industry”.
Presentation at RISC-V Summit 2022 (December 13-14, 2022). Slides: “RISC-V Zkt: Portable Timing Attack Resistance via Dynamic Taint Analysis”.
Presentation at ICMC 2022 (September 14-16, 2022). Slides: “Post-Quantum Crypto Side-Channel Tests and a CSP Walk-Through”.
Short WiP paper at HOST 2022 (June 27-30, 2022): “WiP: Applicability of ISO Standard Side-Channel Leakage Tests to NIST Post-Quantum Cryptography”.
Paper at Security Standardisation Research (SSR) ‘22 (June 6, 2022): “SP 800-22 and GM/T 0005-2012 Tests: Clearly Obsolete, Possibly Harmful”.
Paper in J. Cryptographic Engineering (January 2022): “Development of The RISC-V Entropy Source Interface” (with G.R. Newell and B. Marshall).
Paper at AsianHOST 2021 (December 16-18, 2021): “On Entropy and Bit Patterns of Ring Oscillator Jitter”. Some code examples are available in the bitpat repo. December 2021.
The RISC-V Scalar Crypto specification is freely available and free for anyone to use. This was ratified in November 2021.
ECW / Implementing PQC Workshop. Rennes, France (November 18, 2021). Slides: “Specifying and Testing PQC Hardware Modules”.
CHES 2021 (13-17 September, 2021): Paper: “The design of scalar AES Instruction Set Extensions for RISC-V” (with B. Marshall, G. R. Newell, D. Page, C. Wolf).
Real World Crypto ‘21 (January 13, 2021). Slides: “RISC-V Scalar Crypto” with B. Mashall.